Through the parasitic characteristics of through-hole (via) analysis, we can see that through-holes will often bring a lot of negative effects in high-speed PCB design. In order to reduce the parasitic effect of the negative effects in PCB design, you can try to do as below:

1. In term of the cost and signal quality, select a reasonable size of the through-hole size. For example, the 6-10 layer memory module PCB design, select 10 / 20Mil (drilling / pad) of the through-hole will be better, and for some high-density small-size board, the better choice is 8 / 18Mil (drilling / pad). Under current technical conditions and your PCB requirement, hole size 6mil also is ok, we can control the hole size at 4mil (X-Ray). For the power supply or ground vias can consider the use of larger size, to reduce the impedance.

2. PCB board signal traces should not change layers will be better, that is to say try not to use unnecessary vias.

3. Through-holes (vias) should be near to pin of power and ground, the shorter leads between vias and pins are better, because they will cause electrical inductance increasing. And impedance will be reduced if wire of power and ground as thick as possible.

4. In order to nearest electrical loop,place some vias near to the place where signal exchange. You can even place a large number of redundant ground vias on the PCB. Of course, it’s flexibility in the design.

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